1. Field
Various embodiments of the present disclosure relate to a non-volatile memory device including a nano floating gate, and a method for fabricating the non-volatile memory device.
2. Description of the Related Art
The demand for flash memory, a kind of a non-volatile memory device, is increasing explosively in the mobile and digital industrial fields, such as in mobile phones, MP3 players, digital cameras, Universal Serial Buses (USB) and so forth.
NAND-type flash memory devices, which are presently commercialized, operate based on a change in the threshold voltage of a transistor. The change in threshold voltage is caused by the charge storage state of a floating gate. The floating gate is generally formed of polysilicon and may be charged or discharged. However, non-uniform polysilicon in the floating gate increases the variability of the threshold voltages of the device and operation voltages as high as about 5 to 10 V require a great deal of power consumption. Also, when scaled down, a deteriorated insulation layer may result in charge leakage from the floating gate and into the channel. This is a serious problem because it may result in the loss of stored data.
To solve these problems and achieve high reliability, stably retain charges, consume less power, operate at high speed, and have a high degree of integration, U.S. Pat. No. 8,093,129 discloses a nano-floating gate memory (NFGM) device, which is fabricated by forming a floating gate of nanometer-size particles (which may be simply referred to as nanoparticles). The floating gate is simply a storage node that stores a charge.
Since nanoparticles that are not electrically connected to each other store the charges, the nano-floating gate memory device may minimize the possibility of data loss caused by a deteriorated insulation layer and acquire excellent data retention characteristics. Also, the nano-floating gate memory device may be scaled down for decreased power consumption and, since it is suitable for performing a program and/or erase operation through direct tunneling at low voltages, its operation rate may be improved remarkably. Moreover, since the nano-floating gate memory device uses only a single transistor, it has many advantageous aspects, including the ability to achieve high degrees of integration.
However, the nano-floating gate memory device has the following drawbacks. It is difficult to densely form nanoparticles in the required area, the lower portion of the control gate, which does not allow for much variation in threshold voltages. Also, broad distributions in nanoparticle size may lead to wide threshold voltage distributions, which deteriorate the reproducibility and reliability of the device.